[Coursera] VLSI CAD: Logic to Layout by Rob A. Rutenbar (University of Illinois at Urbana-Champaign)
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10 day statistics (1 downloads)
| Average Time | 30 mins, 01 secs |
| Average Speed | 797.61kB/s |
| Best Time | 30 mins, 01 secs |
| Best Speed | 797.61kB/s |
| Worst Time | 30 mins, 01 secs |
| Worst Speed | 797.61kB/s |