[Coursera] VLSI CAD: Logic to Layout by Rob A. Rutenbar (University of Illinois at Urbana-Champaign)
Coursera

Info hash625ae5f99f1cfdc2b8eb42577ca5271ad78967e0
Last mirror activity0:05 ago
Size1.44GB (1,436,500,392 bytes)
Added2016-07-14 01:32:05
Views1545
Hits2648
ID3238
Downloaded448 time(s)
Uploaded bygravatar.com icon for user courses
Foldercoursera-vlsi-cad-logic-to-layout
Num files218 files [See full list]
Mirrors18 complete, 0 downloading = 18 mirror(s) total [Log in to see full list]

10 day statistics (3 downloads)

Average Time 19 mins, 20 secs
Average Speed 1.24MB/s
Best Time 4 mins, 33 secs
Best Speed 5.26MB/s
Worst Time 30 mins, 05 secs
Worst Speed 795.85kB/s
Report